Link: What Every Programmer Should Know About Memory (114 pages)

В ссылке на PDF из поста JAOO: The Concurrency Revolution: The Hardware Story в конце документа Brian Goetz рекомендует два источника.
Вот ссылка на один из них - What Every Programmer Should Know About Memory (114 pages).

Abstract
As CPU cores become both faster and more numerous, the limiting factor for most programs is now, and will be for some time, memory access. Hardware designers have come up with ever more sophisticated memory handling and acceleration techniques–such as CPU caches–but these cannot work optimally without some help from the programmer. Unfortunately, neither the structure nor the cost of using the memory subsystem of a computer or the caches on CPUs is well understood by most programmers. This paper explains the structure of memory subsystems in use on modern commodity hardware, illustrating why CPU caches were developed, how they work, and what programs should do to achieve optimal performance by utilizing them.

PAUSE instruction in Pentium 4

Using Spin-Loops on Intel® Pentium® 4 Processor and Intel® Xeon™ Processor:
Погрузитесь в мир C + Asm:

Intel Teraflops Research Chip

Intel дорабатывает новый 80-ядерный чип [http://techresearch.intel.com/articles/Tera-Scale/1449.htm].
Цитаты:
"It is the first programmable chip to deliver more than one trillion floating point operations per second (1 Teraflops) of performance while consuming very little power."
"ASCI Red was the first computer to benchmark at a teraflops (1996). That system used nearly 10,000 Pentium® Pro processors running at 200MHz and consumed 500kW of power plus an additional 500kW just to cool the room that housed it. Although not a general purpose computing device, this Teraflops Research Chip delivers 1.0 teraflops of performance and 1.6 terabits aggregate core to core communication bandwidth, while dissipating only 62W."
Процессор выполняет эквивалент 1.000.000.000.000 операций с плавающей точкой в секунду и сравним по мощности с 10.000 Pentium Pro.